1. Field of the Invention
This present invention relates to a Silicon on Insulator (SOI) architecture, more particularly, to a semiconductor memory and a method for manufacturing the same using the SOI architecture.
2. Description of the Related Art
As one type of semiconductor memories, a nonvolatile semiconductor memory that employs a partial SOI substrate is known. When the partial SOI substrate is formed, first, a buried insulating film (BOX film) made of silicon oxide (SiO2) is deposited on a semiconductor substrate, and window portions are formed in a part of the buried insulating film. Thereafter, a semiconductor layer (SOI layer) is deposited on the semiconductor substrate exposed to the window portions and on the buried insulating film.
It is a problem here that, when the semiconductor layer is deposited, step differences corresponding to a thickness of the buried insulating film are formed on boundary portions between the window portions and the buried insulating film. Such step differences of the semiconductor layer cause variations in exposure and variations in process, sometimes resulting in a deterioration of characteristics of transistors formed on the semiconductor layer.
As one of method for solving this problem, after the window portions are formed in the buried insulating film, and the semiconductor layer is deposited thereon, chemical mechanical polishing (CMP) is performed by using the buried insulating film as a stopper, and a surface of the semiconductor layer is thereby planarized. Thereafter, the semiconductor layer is deposited one more time on the buried insulating film and the planarized semiconductor layer. In such a way, planarity of the surface of the semiconductor layer is maintained.
However, in some cases, defects are introduced into the buried insulating film used as the stopper by the mechanical impact of the CMP process, that is, by scratches and a stress, which are caused during the polishing. The defects undesirably exist in a carrier path between a source/drain direction of each transistor formed on the semiconductor layer, and deteriorate turn-off characteristics of each transistor. Moreover, there is a problem that the introduced defects increase other defects in a vertical direction of the buried insulating film, and form a leakage path from each channel region of the transistors to the semiconductor substrate, thereby causing a deterioration of a breakdown voltage.